FAST |
Future
Architecture and System Technology for Scalable Computing |
|
|||||
Research
Tools |
Contact |
|
|||||
Citation Information at Google
Scholar
2025 |
· Jeongho Lee, Sanjun Kim, Jaeyong Lee,
Jaeyong Kang, Sungjin Lee, Nam Sung Kim, Jihong Kim. srNAND: A novel NAND flash organization
for Enhanced Small Read Throughput in SSDs. IEEE Computer Architecture Letters (CAL),
July--December, 2025. [Architecture][Memory] · Jiaqi Lou, Srikar Vanavasam, Yifan Yuan,
Ren Wang, Nam Sung Kim. Dynamic Load Balancer in Intel® Xeon®
Scalable Processor: Performance analyses, enhancements, and guidelines. IEEE/ACM International Symposium on
Computer Architecture (ISCA), June 2025. [Architecture][Networking][Accelerator] · Haneul Park, Jiaqi Lou, Sangjin Lee, Yifan
Yuan, KyoungSoo Park, Yongseok Son, Ipoom Jeong, Nam Sung Kim. A4: Microarchitecture-aware LLC management
for datacenter servers with emerging I/O devices. IEEE/ACM International Symposium on
Computer Architecture (ISCA), June 2025. [Microarchitecture][Systems] · Hyungyo Kim, Nachuan Wang, Qirong Xia,
Jinghan Huang, Amir Yazdanbakhsh, Nam Sung Kim. LIA: A single-GPU LLM inference
acceleration with cooperative AMX-enabled CPU-GPU computation and CXL
offloading. IEEE/ACM International Symposium on
Computer Architecture (ISCA), June 2025. [Architecture][Accelerator][Systems] · Ipoom Jeong, Jinghan Huang, Chuxuan Hu,
Dohyun Park, Jaeyoung Kang, Nam Sung Kim, Yongjoo Park. UPP: Universal predicate pushdown to smart
storage. IEEE/ACM International Symposium on
Computer Architecture (ISCA), June 2025. [Architecture][Storage][Accelerator] · Chang Eun Song, Priyansh Bhatnagar, Zihan
Xia, Nam Sung Kim, Tajana S Rosing, Mingu Kang. Hybrid SLC-MLC RRAM mixed-signal
processing-in-memory architecture for Transformer acceleration via gradient
redistribution. IEEE/ACM International Symposium on
Computer Architecture (ISCA), June 2025. [Architecture][Memory][Accelerator] · Jaeyoung Kang, Qirong Xia, Ipoom Jeong,
Yongjoo Park, Nam Sung Kim. Intel® In-Memory Analytics Accelerator:
performance characterization and guidelines. IEEE International Symposium on
Performance Analysis of Systems and Software (ISPASS), May 2025. [Architecture][Accelerator] · Kaining Zhou, Jian Huang, Nam Sung Kim and
Naresh Shanbhag. A full-system, programmable, and
extensible in-memory computing simulation framework for deep learning. IEEE/ACM Design Automation Conference
(DAC), June
2025. [Architecture][Accelerator][Infrastructure] · Qirong Xia†, Houxiang Ji†, Yang Zhou, and
Nam Sung Kim. Hardware-accelerated kernel-space memory
compression using Intel® QAT. IEEE Computer Architecture Letters (CAL),
January--June, 2025. [System][Accelerator] †Co-first authors. · Chihun Song, Michael Jaemin Kim, Yan Sun,
Houxiang Ji, Kyungsan Kim, TaeKyeong Ko, Jung Ho Ahn, and Nam Sung Kim. X-PPR: Post package repair for CXL memory.
IEEE Computer Architecture Letters (CAL),
January--June, 2025. [Architecture][DRAM] · Zihan Xia, Chihun Song, Ram Krishna,
Ashita Victor, Srujan Penta, Muhannad S. Bakir, Elyse Rosenbaum, Nam Sung
Kim, Mingu Kang. Exploiting chiplet integration technology
for fast high-capacity DRAM modules. IEEE Transactions on Very Large Scale
Integration Systems (TVLSI), to appear. [Architecture][DRAM] · Houxiang Ji, Minho Kim, Seonmu Oh, Daehoon
Kim, Nam Sung Kim. Cooperative memory deduplication with
Intel Data Streaming Accelerator. IEEE Computer Architecture Letters (CAL),
January—June, 2025. [Accelerator][System] · Eunbi Jeong, Ipoom Jeong, Myung Kuk Yoon,
Nam Sung Kim. Warped-compaction: Maximizing GPU register
file bandwidth utilization
via operand compaction. IEEE International Symposium on
High-Performance Computer Architecture (HPCA), March 2025. [Architecture][GPU] · Yan Sun, Jongyul Kim, Dougas Yu, Jiyuan
Zhang, Siyuan Chai, Michael Jaemin Kim, Hwayong Nam, Jaehyun Park, Eojin Na,
Yifan Yuan, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim. M5: Mastering page migration and memory
management for CXL-based tiered memory systems. ACM International Conference on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS) April, 2025. [System][Architecture][Memory] · Seungmin Baek, Minbok Wi, Seonyong Park, Hwayong
Nam, Michael Jaemin Kim, Nam Sung Kim, Jung Ho Ahn. Marionette: A RowHammer attack via row
coupling.
ACM International Conference on
Architectural Support for Programming Languages and Operating Systems
(ASPLOS) April, 2025. [System][Security][Architecture][Memory] |
2024 |
· Deming
Chen, Alaa Youssef, Ruchi Pendse, André Schleife, Bryan K Clark, Hendrik
Hamann, Jingrui He, Teodoro Laino, Lav Varshney, Yuxiong Wang, Avirup Sil,
Reyhaneh Jabbarvand, Tianyin Xu, Volodymyr Kindratenko, Carlos Costa, Sarita
Adve, Charith Mendis, Minjia Zhang, Santiago Núñez-Corrales, Raghu Ganti,
Mudhakar Srivatsa, Nam Sung Kim, Josep Torrellas, Jian Huang, Seetharami
Seelam, Klara Nahrstedt, Tarek Abdelzaher, Tamar Eilam, Huimin Zhao, Matteo
Manica, Ravishankar Iyer, Martin Hirzel, Vikram Adve, Darko Marinov, Hubertus
Franke, Hanghang Tong, Elizabeth Ainsworth, Han Zhao, Deepak Vasisht, Minh
Do, Fabio Oliveira, Giovanni Pacifici, Ruchir Puri, Priya Nagpurkar. Transforming
the hybrid
cloud
for emerging
AI workloads. arXiv
preprint arXiv:2411.13239. [Architecture][System][ML] · Houxiang
Ji, Srikar Vanavasam, Yang Zhou, Qirong Xia, Jinghan Huang, Yifan Yuan, Ren
Wang, Pekon Gupta, Bhushan Chitlur, Ipoom Jeong, and Nam Sung Kim. Demystifying a
CXL Type-2 device: A heterogeneous cooperative computing perspective. IEEE/ACM
International Symposium on Microarchitecture (MICRO), November 2024. [System][Accelerator][Memory] · Zhiting
Zhu, Newton Ni, Yibo Huang, Yan Sun, Zhipeng Jia, Nam Sung Kim, Emmett
Witchel. Lupin: Tolerating
partial failures in a CXL Pod. Workshop
on Disruptive Memory Systems, November 2024. [System][Memory][Reliability] · Hyoungwook
Nam, Raghavendra Pradyumna Pothukuchi, Bo Li, Nam Sung Kim, Josep Torrellas. ACM
International Conference on Parallel Architectures and Compilation Techniques
(PACT), October 2024. [Architecture][CPU][Security][ML/AI] · Ram
Krishna, Ashita Victor, Srujan Penta, Xu Chen, Muhannad Bakir, Nam Sung Kim,
Elyse Rosenbaum. Yield-aware interposer
design for UCIe interconnects. IEEE
Conference on Electrical Performance of Electronics Packaging and Systems
(EPEPS), October 2024. [Circuit][Interconnect] · Yifan
Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao, Sanjay Kumar, Philip Lantz,
Vivekananthan Sanjeepan, Jorge Cabrera, Atul Kwatra, Rajesh Sankaran, Ipoom
Jeong, Nam Sung Kim. Intel accelerator
ecosystem: An SoC-oriented perspective. IEEE/ACM
International Symposium on Computer Architecture (ISCA), June 2024. [Architecture][CPU][Accelerator][Systems] · Jinghan
Huang, Jiaqi Lou, Srikar Vanavasam, Xinhao Kong, Houxiang Ji, Ipoom Jeong,
Eun Kyung Lee, Danyang Zhuo, Nam Sung Kim. HAL: Hardware-assisted
load balancing for energy-efficient SNIC-host cooperative computing. IEEE/ACM
International Symposium on Computer Architecture (ISCA), June 2024. [Architecture][Accelerator][Systems][Network] · Hwayong
Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song,
Nam Sung Kim, Jung Ho Ahn. DRAMScope: Uncovering
DRAM microarchitecture and characteristics by issuing memory commands. IEEE/ACM
International Symposium on Computer Architecture (ISCA), June 2024. [Architecture][Memory] · Hyungyo
Kim, Gaohan Ye, Nachuan Wang, Amir Yazdanbakhsh, and Nam Sung Kim. Exploiting Intel®
Advanced Matrix Extensions (AMX) for large language model inference. IEEE
Computer Architecture Letters (CAL), January—June 2024. [Architecture][Accelerator][Systems][ML/AI] · Ipoom
Jeong, Eunbi Jeong, Nam Sung Kim, and Myung Kuk Yoon. Triple-A: Early operand
collector allocation for maximizing GPU register bank utilization. IEEE
Embedded Systems Letters (ESL), June 2024. [Architecture][GPU] · Jiaqi
Lou, Xinhao Kong, Jinghan Huang, Wei Bai, Nam Sung Kim, Danyang Zhuo. Harmonic:
Hardware-assisted RDMA performance isolation for public clouds. USENIX
Symposium on Networked Systems Design and Implementation (NSDI), April, 2024. [Systems][Network] · Chihun
Song, Michael Jaemin Kim, Tianchen Wang, Houxiang Ji, Jinghan Huang, Ipoom
Jeong, Jaehyun Park, Hwayong Nam, Minbok Wi, Jung Ho Ahn, Nam Sung Kim. TAROT: A CXL
SmartNIC-based defense against multi-bit errors by row hammer attacks. ACM
International Conference on Architectural Support for Programming Languages
and Operating Systems (ASPLOS) April, 2024. [Architecture][Memory][Accelerator]
[Security] · Reese
Kuper, Ipoom Jeong, Yifan Yuan, Ren Wang, Narayan Ranganathan, Nikhil Rao,
Jiayu Hu, Sanjay Kumar, Philip Lantz, Nam Sung Kim. ACM
International Conference on Architectural Support for Programming Languages
and Operating Systems (ASPLOS) April, 2024. [Architecture][CPU][Accelerator] · Jaehyun
Park, Jaewan Choi, Kwanhee Kyung, Michael Jaemin Kim, Yongsuk Kwon, Nam Sung
Kim, Jung Ho Ahn. Unleashing the
power of PIM for batched Transformer-based generative model inference. ACM
International Conference on Architectural Support for Programming Languages
and Operating Systems (ASPLOS) April, 2024. [Architecture][Accelerator][Memory][ML/AI] · [IEEE Micro Toppicks Honorable
Mention] Soroush
Ghodrati, Sean Kinzer, Hanyang Xu, Rohan Mahapatra, Yoonsung, Byung Hoon Ahn,
Dong Kai Wang, Lavanya Karthikeyan, Amir Yazdanbakhsh, Jongse Park, Nam Sung
Kim, Hadi Esmaeilzadeh. Tandem processor:
grappling with emerging operators in neural networks. ACM
International Conference on Architectural Support for Programming Languages
and Operating Systems (ASPLOS) April, 2024. [Architecture][Accelerator][ML/AI] · Pham
Tuan Kiet, Seokjoo Cho, Sang Jin Lee, Lan Anh Nguyen, Hyeongi Yeo, Ipoom
Jeong, Sungjin Lee, Nam Sung Kim, and Yongseok Son. ScaleCache: A scalable
page cache for multiple solid-state drives. ACM
SIGOPS Eurosys, April 2024. [Systems][Storage] · Sang-Soo
Park, KyungSoo Kim, Jinin So, Jin Jung, Jonggeon Lee, Kyoungwan Woo, Nayeon
Kim, Younghyun Lee, Hyungyo Kim, Yongsuk Kwon, Jinhyun Kim, Jieun Lee,
YeonGon Cho, Yongmin Tai, Jeonghyeon Cho, Hoyoung Song, Jung Ho Ahn, and Nam
Sung Kim. IEEE
International Symposium on High-Performance Computer Architecture (HPCA),
March 2024. [Architecture][Memory]
[Accelerator][ML/AI] · Minjae
Lee, Seongmin Park, Hyungmin Kim, Minyong Yoon, Janghwan Lee, Junwon Choi,
Nam Sung Kim, Mingu Kang, Jungwook Choi. SPADE: Sparse
pillar-based 3D object detection accelerator for autonomous driving. IEEE
International Symposium on High-Performance Computer Architecture (HPCA),
March 2024. [Architecture][Accelerator]
[ML/AI] |
2023 |
· Seunghak Lee, Ki-Dong Kang, Gyeongseo
Park, Nam Sung Kim, and Daehoon Kim. NoHammer: Preventing
row hammer with last-level cache management. IEEE
Computer Architecture Letters (CAL), July-December 2023. [Architecture][Memory][Security] ·
Hwayong
Nam, Seungmin Baek, Minbok Wi, Michael Jaemin Kim, Jaehyun Park, Chihun Song,
Nam Sung Kim, and Jung Ho Ahn. X-ray:
Discovering DRAM internal structure and error characteristics by issuing
memory commands. IEEE
Computer Architecture Letters (CAL), July-December 2023. [Architecture][Memory] ·
Jaewan
Choi, Jaehyun Park, Kwanhee Kyung, Nam Sung Kim, and Jung Ho Ahn. IEEE
Computer Architecture Letters (CAL), July-December 2023. [Architecture][Accelerator][Memory][ML/AI] ·
Ipoom
Jeong, Jiaqi Lou, Yongseok Son, Yongjoo Park, Yifan Yuan, and Nam Sung Kim. LADIO:
Leakage-aware direct I/O for I/O-intensive workloads. IEEE
Computer Architecture Letters (CAL), July-December 2023. [Systems][Network][Storage][CPU] ·
[Best Paper Runner-up Award] Jinghan Huang, Jiaqi Lou, Yan Sun,
Tianchen Wang, Eun Kyung Lee, and Nam Sung Kim. Making sense of using
a SmartNIC to reduce datacenter tax from SLO and TCO perspectives. IEEE
International Symposium on Workload Characterization (IISWC), October 2023. [Systems][Network][Accelerator] ·
Yan Sun,
Yifan Yuan, Zeduo Yu, Chihun Song, Reese Kuper, Jinghan Huang, Houxiang Ji,
Siddharth Agarwal, Jiaqi Lou, Ipoom Jeong, Ren Wang, Jung Ho Ahn, Tianyin Xu,
Nam Sung Kim. Demystifying CXL memory with genuine
CXL-ready systems and devices. IEEE/ACM
International Symposium on Microarchitecture (MICRO), October 2023. [Systems][Memory] ·
Michael
Jaemin Kim, Minbok Wi, Jaehyun Park, Seoyoung Ko, Jae Young Choi, Hwayoung
Nam, Nam Sung Kim, Jung Ho Ahn, and Eojin Lee. How to kill the
second bird with one ECC: The Pursuit of row hammer resilient DRAM. IEEE/ACM
International Symposium on Microarchitecture (MICRO), October 2023. [Architecture][Memory][Security] ·
Houxiang
Ji, Yan Sun, Mark Mansi, Yifan Yuan, Jinghan Huang, Reese Kuper, Michael
Swift, Nam Sung Kim. STYX:
Exploiting SmartNIC capability to reduce datacenter memory tax. USENIX
Annual Technical Conference (ATC), July 2023. [Systems][Network][Accelerator] ·
Krisztian
Flautner, Nam Sung Kim, Steve Martin, David Blaauw, and Trevor Mudge. RETROSPECTIVE:
Drowsy Caches: Simple Techniques for Reducing Leakage Energy. ISCA@50
Retrospective: 1996-2020, June 2023. [Microarchitecture][CPU] ·
Xinhao
Kong, Jiaqi Lou, Wei Bai, Nan Sung Kim, Danyang Zhuo. Towards a manageable
intra-host network. Workshop
on Hot Topics in Operating Systems (HotOS), June 2023. [Systems][Network] ·
Dong Kai
Wang, Jiaqi Lou, Naiyin Jin, Edwin Mascarenhas, Rohan Mahapatra, Sean Kinzer,
Soroush Ghodrati, Amir Yazdanbakhsh, Hadi Esmaeilzadeh, Nam Sung Kim. MESA:
Microarchitecture extensions for spatial architecture generation. IEEE/ACM
International Symposium on Computer Architecture (ISCA), June 2023. [Microarchitecture][CPU] ·
Byoungchan
Oh, Nilmini Abeyratne, Nam Sung Kim, Jeongseob Ahn, Ronald G. Dreslinski,
Trevor Mudge. Rethinking DRAM’s
page mode with STT-MRAM.
IEEE
Transactions on Computers, May 2023. [Architecture][Memory] ·
[Guest
Editorial] John Kim, Nam
Sung Kim. Special
issue on emerging system interconnects. IEEE
Micro, May—June, 2023. ·
Jinghan
Huang, Jiaqi Lou, Yan Sun, Tianchen Wang, Eun Kyung Lee, Nam Sung Kim. Analyzing energy
Efficiency of a server with a SmartNIC under SLO Constraints. IEEE
International Symposium on Performance Analysis of Systems and Software
(ISPASS), April 2023. [Systems][Network][Accelerator] ·
Yifan
Yuan, Jinghan Huang, Yan Sun, Tianchen Wang, Jacob Nelson, Dan Ports, Yipeng
Wang, Ren Wang, Charlie Tai, and Nam Sung Kim. RAMBDA: RDMA-driven
acceleration framework for memory-intensive us-scale datacenter applications. IEEE
International Symposium on High-Performance Computer Architecture (HPCA),
February 2023. [Systems][Network][Accelerator] · Minbok Wi, Jaehyun Park, Seoyoung Ko,
Michael Jaemin Kim, Eojin Lee, Nam Sung Kim, and Jung Ho Ahn. SHADOW: Preventing row
hammer in DRAM with intra-subarray row shuffling. IEEE International Symposium on
High-Performance Computer Architecture (HPCA), February 2023. [Architecture][Memory][Security] |
2022 |
· Ashutosh Dhar, Member, Edward Richter,
Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, and Deming Chen. DML: Dynamic
partial reconfiguration with scalable task scheduling for multi-applications
on FPGAs. IEEE Transactions on Computer, October 2022. [Architecture][FPGA] · Mohammad Alian, Siddharth Agarwal, Jongmin
Shin, Neel Patel, Yifan Yuan, Daehoon Kim, Ren Wang, Nam Sung Kim. IDIO: Network-driven,
inbound network data orchestration on server processors. IEEE/ACM International Symposium on
Microarchitecture (MICRO), October 2022. [Architecture][CPU][Network] · Youjie Li, Amar Phanishayee, Derek Murray,
Jakub Tamawski, Nam Sung Kim. International Conference on Very Large
Databases (VLDB), September 2022. [Systems][ML/AI] · Cheng Wan*, Youjie Li*, Ang Li, Nam Sung
Kim, and Yingyan Lin. Machine Learning and Systems (MLSys),
August 2022. [Systems][ML/AI] · Ahmed Abulila, Izzat El Hajj, Myoungsoo
Jung, Nam Sung Kim. ASAP: Architecture
support for asynchronous prersistence. IEEE/ACM International Symposium on
Computer Architecture (ISCA), June 2022. [Architecture][CPU][Memory] |
· Jin Hyun Kim, Shin-haeng Kang, Sukhan Lee,
Hyeonsu Kim, Yuhwan Ro, Seungwon Lee, David Wang, Jihyun Choi, Jinin So,
Yeongon Cho, Joonho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim. Aquabolt-XL HBM2-PIM,
LPDDR5-PIM with in-memory processing, and AXDIMM with acceleration buffer. IEEE Micro, May — June, 2022. [Architecture][Memory] · Cheng Wan, Youjie Li, Cameron R. Wolfe,
Anastasios Kyrillidis, Nam Sung Kim, and Yingyan Lin. International Conference on Learning
Representations (ICLR), April 2022. [Systems][ML/AI] |
·
Yifan Yuan, Omar Alama, Jiawei Fei, Jacob
Nelson, Dan R. K. Ports, Amedeo Sapio, Marco Canini, Nam Sung Kim. Unlocking
the power of inline floating-point operations on programmable switches. USENIX Symposium on Networked Systems Design and Implementation
(NSDI), April, 2022. [Systems][Network][Accelerator] · Zhengdong Bei, Nam Sung Kim, Kai Hwang,
and Zhibin Yu. OSC: An online
self-configuring big data framework for optimization of QoS. IEEE Transactions on Computers (TC), April 2022. [Systems] · Shinhaeng Kang, Sukhan Lee, Byeongho Kim,
Eojin Lee, Hweesoo Kim, Kyomin Sohn, Nam Sung Kim. An
FPGA-based RNN-T inference accelerator with PIM-HBM. ACM International Symposium on Field-Programmable Gate Arrays (FPGA),
February, 2022. [Architecture][Memory][Accelerator][ML/AI] · Liu Ke, Xuan Zhang, Jinin So, Jong-Geon
Lee, Shin-Haeng Kang, Sukhan Lee, Songyi Han, YeonGon Cho, Jin Hyun Kim,
Yongsuk Kwon, KyungSoo Kim, Jin Jung, Ilkwon Yun, Sung Joo Park, Hyunsun
Park, Joonho Song, Jeonghyeon Cho, Kyomin Sohn, Nam Sung Kim, Hsien-Hsin S.
Lee. Near-memory
processing in action: Accelerating personalized recommendation with AxDIMM.
IEEE Micro, January
—February, 2022. [Architecture][Systems][Memory][ML/AI] |
2021 |
· Seunghak Lee, Ki-Dong Kang, Hwanjun Lee,
Hyungwon Park, Younghoon Son, Nam Sung Kim, Daehoon Kim. GreenDIMM:
OS-assisted DRAM power management for DRAM with a sub-array granularity
power-down state. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October, 2021. [Architecture][Systems][Memory] · Ki-Dong Kang, Gyeongseo Park, Hyosang Kim,
Mohammad Alian, Nam Sung Kim, and Daehoon Kim. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October, 2021. [Architecture][Systems][Network] · Bingchao Li, Jizeng Wei, Nam Sung Kim. Virtual-Cache:
A cache-line borrowing technique for efficient GPU cache architectures. Microprocessors and Microsystems, September, 2021. [Architecture][GPU] · Youjie Li, Amar Phanishayee, Derek Murray,
and Nam Sung Kim. Doing
more with less: Training large DNN models on commodity servers for the masses.
ACM SIGOPS HotOS XVIII, May 2021. [Systems][ML/AI] · [IEEE Micro Top Picks] Dimitrios Skarlatos, Umur Darbaz,
Bhargava Gopireddy, Nam Sung Kim, and Josep Torrellas. BabelFish:
Fusing address translations for containers. IEEE Micro, May — June, 2021. [Architecture][CPU] · [IEEE Micro Top Picks Honorable Mention] Sukhan Lee, Shin-haeng Kang, Jaehoon Lee,
Hyeonsu Kim, Eojin Lee, Seungwoo Seo, Hosang Yoon, Seungwon Lee, Kyounghwan
Lim, Hyunsung Shin, Jinhyun Kim, Seongil O, Anand Iyer, David Wang, Kyomin
Sohn, and Nam Sung Kim. Hardware
Architecture and Software Stack for PIM Based on Commercial DRAM Technology.
IEEE/ACM International Symposium on Computer Architecture (ISCA), May
2021. [Architecture][Memory][ML/AI] · Yifan Yuan, Mohammad Alian, Yipeng Wang,
Ren Wang, Ilia Kurakin, Charlie Tai, and Nam Sung Kim. Don't Forget
the I/O When Allocating Your LLC. IEEE/ACM International Symposium on Computer Architecture (ISCA), May
2021. [Architecture][CPU][Network] · Jie Zhang, Miryeong Kwon, Donghyun Gouk,
Sungjoon Koh, Nam Sung Kim, Mahmut Taylan Kandemir, Myoungsoo Jung. Revamping
storage class memory with hardware automated memory-over-storage solution. IEEE/ACM International Symposium on Computer Architecture (ISCA), May
2021. [Architecture][Storage] · Mohammad Alian, Jongmin Shin, Ki-Dong
Kang, Ren Wang, Alexandros Daglis, Daehoon Kim, and Nam Sung Kim. IDIO:
Orchestrating inbound network data on server processors. IEEE Computer Architecture Letters (CAL), 20(1), January—June 2021. [Architecture][CPU][Network] · Dong Kai Wang and Nam Sung Kim. DiAG: A
dataflow-inspired architecture for general-purpose processors. ACM International
Conference on Architectural Support for Programming Languages and Operating
Systems (ASPLOS), April, 2021. [Microarchitecture][CPU] · Yifan Yuan, Yipeng Wang, Ren Wang, Rangeen
Basu Roy Chowdhury, Charlie Tai, and Nam Sung Kim. QEI: Query
acceleration can be generic and efficient in the cloud. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), February 2021. [Architecture][Accelerator][Network] · [World’s
First Professing-In-Memory Chip from a Major Memory Manufacturer] Young-Cheon Kwon , Suk Han Lee , Jaehoon
Lee , Sang-Hyuk Kwon , Je Min Ryu , Jong-Pil Son , Seongil O , Hak-Soo Yu ,
Haesuk Lee , Soo Young Kim , Youngmin Cho , Jin Guk Kim , Jongyoon Choi ,
Hyun-Sung Shin , Jin Kim , BengSeng Phuah , HyoungMin Kim , Myeong Jun Song ,
Ahn Choi , Daeho Kim , SooYoung Kim , Eun-Bong Kim , David Wang , Shinhaeng
Kang , Yuhwan Ro , Seungwoo Seo , JoonHo Song , Jaeyoun Youn , Kyomin Sohn
and Nam Sung Kim. IEEE International Solid-State Circuit Conference (ISSCC), February
2021. [Circuit][Memory] · Young-Hwa Kim, …, Seung-Jun Bae, Nam Sung
Kim, and Jung-Bae Lee. IEEE International Solid-State Circuit Conference (ISSCC), February
2021. [Circuit][Memory] · Chang-Kyo Lee, Hyung-Joon Chi, Jin-Seok
Heo, Jung-Hwan Park, Jin-Hun Jang, Dongkeon Lee, Jae-Hoon Jung, Dong-Hun Lee,
Dae-Hyun Kim, Kihan Kim, Sang-Yun Kim, Dukha Park, Youngil Lim, Geuntae Park,
Seung-Jun Lee, Seungki Hong, Dae-Hyun Kwon, Isak Hwang, Byongwook Na,
Kyung-Ryun Kim, Seouk-Kyu Choi, Hyein Choi, Won-Il Bae, Jeong-Don Ihm,
Seung-Jun Bae, Nam Sung Kim, and Jung-Bae Lee. IEEE Journal of Solid-State Circuits (JSSC), 56(1), January 2021. [Circuit][Memory] · [World’s
Highest Bandwidth DRAM] Ki
Chul Chun, Yong Ki Kim, Yesin Ryu, Jaewon Park, Chi Sung Oh, Young Yong Byun,
So Young Kim, Dong Hak Shin, Jun Gyu Lee, Byung-Kyu Ho, Min-Sang Park,
Seong-Jin Cho, Seunghan Woo, Byoung Mo Moon, Beomyong Kil, Sungoh Ahn, Jae
Hoon Lee, Soo Young Kim, Seouk-Kyu Choi, Jae-Seung Jeong, Sung-Gi Ahn, Jihye
Kim, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, and Jung-Bae Lee. IEEE Journal of Solid-State Circuits (JSSC), 56(1), January 2021. [Circuit][Memory] |
|
2020 |
· Jie Zhang, Miryeong Kwon, Sanghyun Han, Nam
Sung Kim, Mahmut Kandemir, and Myoungsoo Jung. FastDrain:
Removing page victimization overheads in NVMe storage stack. IEEE Computer Architecture Letters (CAL), 19(2), July-December 2020. · Soroush Ghodrati, Hardik Sharma, Sean
Kinzer, Amir Yazdanbakhsh, Jongse Park, Nam Sung Kim, Doug Burger, and Hadi
Esmaeilzadeh. ACM International Conference on Parallel Architectures and
Compilation Techniques (PACT), October 2020. · Ashutosh Dhar, Xiaohao Wang, Hubertus
Franke, Jinjun Xiong, Jian Huang, Wen-mei Hwu, Nam Sung Kim, and Deming Chen. FReaC
Cache: Folded-logic reconfigurable computing in the last level cache. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October, 2020. · Soroush Ghodrati, Byung Hoon Ahn, Joon
Kyung Kim, Sean Kinzer, Brahmendra Reddy Yatham, Navateja Alla, Hardik
Sharma, Mohammad Alian, Eiman Ebrahimi, Nam Sung Kim, Cliff Young, and Hadi
Esmaeilzadeh. Planaria:
Dynamic architecture fission for spatial multi-tenant acceleration of deep
neural networks. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October, 2020. · Mohammad Alian, Yifan Yuan, Jie Zhang, Ren
Wang, Myoungsoo Jung, and Nam Sung Kim. Data
direct I/O characterization for future I/O system exploration. IEEE International Symposium on Performance Analysis of Systems and
Software (ISPASS), August 2020. · Soroush Ghodrati, Hardik Sharma; Cliff
Young, Nam Sung Kim and Hadi Esmaeilzadeh. Bit-parallel
vector composability for neural acceleration. IEEE/ACM Design Automation Conference (DAC), July 2020. · Ki-Dong Kang, Gyeongseo Park, Nam Sung
Kim, and Daehoon Kim. Network
packet processing mode-aware power management for data center servers. IEEE Computer Architecture Letters (CAL), 19(1), January-June 2020. · [IEEE
Micro Top Picks]
Dimitrios Skarlatos, Umur Darbaz, Bhargava Gopireddy, Nam Sung Kim, and Josep
Torrellas. BabelFish:
Fusing address translations for containers. IEEE/ACM International Symposium on Computer Architecture (ISCA), May
2020. · [World’s
Highest Bandwidth DRAM]
Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin
Ryu, Jaewon Park, Sinho Kim, Sanguhn Cha, Donghak Shin, Jungyu Lee, Jong-Pil
Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim,
Yongsik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook
Lee, Seungseob Lee, Sooyoung Kim, Botak Lim, Seouk-Kyu Choi, Jin-Guk Kim,
Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il
Park, and Jung-Bae Lee. IEEE International Solid-State Circuits Conference (ISSCC), February
2020. · Yongseok Son, Moonsub Kim, Sunggon Kim,
Heon Y Yeom, Nam Sung Kim, and Hyuck Han. Design
and implementation of SSD-assisted backup and recovery for database systems. IEEE Transactions on Knowledge and Data Engineering (TKDE), 32(2),
February 2020. · [Best Paper Award] Ashutosh Dhar,
Mang Yu, Wei Zuo, Xiaohao Wang, Nam Sung Kim, and Deming Chen. Leveraging dynamic
partial reconfiguration with scalable ILP based task scheduling. IEEE International Conference on VLSI
Design and International Conference on
Embedded Systems (VLSID), January 2020. |
|
2019 |
· Seunghak Lee, Nam Sung Kim, and Daehoon
Kim. Exploiting
OS-level memory offlining for DRAM power management. IEEE Computer Architecture Letters (CAL), 18(2), July-December 2019. · Mohammad Alian and Nam Sung Kim. Netdimm:
Low-latency near-memory network interface architecture. IEEE/ACM International
Symposium on Microarchitecture (MICRO), October 2019. · Hyojun Son, Hanjoon Kim, Hao Wang, Nam
Sung Kim, and John Kim. Ghost
routers: Energy-efficient asymmetric multicore processors with symmetric NoCs. IEEE/ACM International Symposium on Networks-on-Chip (NOC), October
2019. · Mingu Kang, Prakalp Srivastava, Vikram
Adve, Nam Sung Kim, and Naresh R Shanbhag. An
energy-efficient programmable mixed-signal accelerator for machine learning
algorithms. IEEE Micro, 39(5), September-October 2019. · Byoungchan Oh, Nilmini Abeyratne, Nam Sung
Kim, Ronald G Dreslinski, and Trevor Mudge. SMART:
STT-MRAM architecture for smart activation and sensing. IEEE/ACM International Symposium on Memory Systems (MEMSYS),
September 2019. · Ashutosh Dhar, Sitao Huang, Jinjun Xiong,
Damir Jamsek, Bruno Mesnet, Jian Huang, Nam Sung Kim, Wen-mei Hwu, and Deming
Chen. Near-memory
and in-storage FPGA acceleration for emerging cognitive computing workloads. IEEE Computer Society Annual Symposium on VLSI (ISVLSI), July 2019. · Dong Kai Wang and Nam Sung Kim. A2M:
Approximate algebraic memory using polynomials rings. IEEE/ACM International Symposium on Low Power Electronics and Design
(ISLPED), July 2019. · Bingchao Li, Jizeng Wei, Jizhou Sun,
Murali Annavaram and Nam Sung Kim. An efficient GPU
cache architecture for applications with irregular memory access patterns. ACM Transactions on Architecture and Code Optimization (TACO), 16(3),
June 2019. · Sungjoon Koh, Jie Zhang, Miryeong Kwon,
Yoon Jungyeon, David Donofrio, Nam Sung Kim, and Myoungsoo Jung. Exploring
fault-tolerant erasure codes for scalable all-flash array clusters. IEEE Transactions on Parallel and Distributed Systems (TPDS), 30(6),
June 2019. · Zhenhong Liu, Amir Yazdanbakhsh, Dong Kai
Wang, Hadi Esmaeilzadeh and Nam Sung Kim. AxMemo:
hardware-compiler co-design for approximate code memoization. IEEE/ACM International Symposium on Computer Architecture (ISCA),
June 2019. · Nam Sung Kim, Choungki Song, Woo Young Cho, Jian Huang,
and Myoungsoo Jung. LL-PCM:
Low-latency phase change memory architecture. IEEE/ACM Design Automation Conference (DAC), June 2019. · [Invited] Nam Sung Kim and
Pankaj Mehra. IEEE/ACM Design Automation Conference (DAC),
June 2019. · Ahmed Abulila, Vikram Sharma Mailthody,
Zaid Qureshi, Jian Huang, Nam Sung Kim, Jinjun Xiong, Wen-mei Hwu. FlatFlash:
Exploiting the byte-accessibility of SSDs within a unified memory-storage
hierarchy. ACM International Conference on Architectural Support for Programming
Languages and Operating Systems (ASPLOS), April, 2019. |
|
2018 |
· Youjie Li, Mingchao Yu, Songze Li, Salman
Avestimehr, Nam Sung Kim, and Alexander Schwing. Pipe-SGD:
A decentralized pipelined SGD framework for distributed deep net training. Advances in Neural Information Processing Systems (NeurIPS), December
2018. · Mingchao Yu, Zhifeng Lin, Krishna Narra,
Songze Li, Youjie Li, Nam Sung Kim, Alexander Schwing, Murali Annavaram, and
Salman Avestimehr. Advances in Neural Information Processing Systems (NeurIPS), December
2018. · [Invited] Nam Sung Kim. Practical
challenges in supporting function in memory. IEEE Asian Solid-State Circuits Conference (A-SSCC), November 2018. · Byoungchan Oh, Nam Sung Kim, Jeongseob Ahn,
Bingchao Li, Ronald G Dreslinski, and Trevor Mudge. A load
balancing technique for memory channels. IEEE/ACM International Symposium on Memory Systems (MEMSYS), October
2018. · [Best
Paper Nomination w/ top 1.1% of all the submissions][Hardware Prototype
Demonstration] Mohammad
Alian, Seung Won Min, Hadi Asgharimoghaddam, Ashutosh Dhar, Dong Kai Wang,
Thomas Roewer, Adam McPadden, Oliver OHalloran, Deming Chen, Jinjun Xiong,
Daehoon Kim, Wen-mei Hwu, and Nam Sung Kim. Application-transparent
near-memory processing architecture with memory channel network. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October, 2018. · [Hardware
Prototype Demonstration]
Youjie Li, Jongse Park, Mohammad Alian, Yifan Yuan, Qu Zheng, Petian Pan, Ren
Wang, Alexander Gerhard Schwing, Hadi Esmaeilzadeh, and Nam Sung Kim. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October, 2018. · Donghyun Gouk, Miryeong Kwon, Jie Zhang,
Sungjoon Koh, Wonil Choi, Nam Sung Kim, Mahmut Kandemir, and Myoungsoo Jung. Amber:
Enabling precise full-system simulation with detailed modeling of all SSD
resources. IEEE/ACM International Symposium on Microarchitecture (MICRO),
October 2018. · Jie Zhang, Miryeong Kwon, Donghyun Gouk,
Changlim Lee, Mohammad Alian, Myoungjun Chun, Mahmut Kandemir, Nam Sung Kim,
Jihong Kim, and Myoungsoo Jung. FlashShare:
Punching through server storage stack from kernel to firmware for ultra-low
latency SSDs. USENIX Symposium on Operating Systems Design and Implementation
(OSDI), October, 2018. · Zhenhong Liu, Amir Yazdanbakhsh, Taejoon
Park, Hadi Esmaeilzadeh, and Nam Sung Kim. SiMul:
An algorithm-driven approximate multiplier design for machine learning. IEEE Micro, 38(4), July-August 2018. · Sukhan Lee, Hyunyoon Cho, Young Hoon Son,
Yuhwan Ro, Nam Sung Kim, and Jung Ho Ahn. Leveraging
power-performance relationship of energy-efficient modern DRAM devices. IEEE Access, June 2018. · Amir Yazdanbakhsh, Hajar Falahati, Philip
J. Wolfe, Kambiz Samadi, Hadi Esmaeilzadeh, and Nam Sung Kim. GANAX: A unified SIMD-MIMD acceleration for generative adversarial
network. IEEE/ACM International
Symposium on Computer Architecture (ISCA), June 2018. · Prakalp Srivastava, Mingu Kang, Sujan
Kumar Gonugondla, Sungmin Lim, Jungwook Choi, Vikram Adve, Nam Sung Kim and
Naresh Shanbhag. PROMISE: An end-to-end design of a programmable mixed-signal
accelerator for machine learning algorithms. IEEE/ACM International
Symposium on Computer Architecture (ISCA), June 2018. · Myoungsoo Jung, Jie Zhang, Ahmed Abulila,
Miryeong Kwon, Narges Shahidi, John Shalf, Nam Sung Kim and Mahmut Kandemir. SimpleSSD:
Modeling solid state drive for holistic system simulation. IEEE Computer Architecture Letter (CAL), 17(1), January-June 2018. · Amir Yazdanbakhsh, Michael Brzozowski,
Behnam Khaleghi, Soroush Ghodrati, Kambiz Samadi, Hadi Esmaeilzadeh† and Nam
Sung Kim. FxGAN: A unified MIMD-SIMD FPGA acceleration with decoupled
access-execute units for generative adversarial networks. IEEE International
Symposium on Field-Programmable Custom Computing Machines (FCCM), April 2018. · Gunjae Koo, Hyeran Jeon, Zhenhong Liu, Nam
Sung Kim and Murali Annavaram. CTA-aware prefetching and scheduling for GPU. IEEE International
Parallel and Distributed Processing Symposium (IPDPS), May 2018. · Jie Zhang, Shuwen Gao, Nam Sung Kim and
Myoungsoo Jung. CIAO: Cache interference-aware throughput-oriented architecture and
scheduling. IEEE International
Parallel and Distributed Processing Symposium (IPDPS), May 2018. · Amir Yazdanbakhsh, Kambiz Samadi, Hadi
Esmaeilzadeh, and Nam Sung Kim. A SIMD-MIMD acceleration with access-execute decoupling for
generative adversarial networks. SysML Conference
(SysML), February 2018. · Xiaofan Zhang, Mohamed El Hadedy, Wen-mei
Hwu, Nam Sung Kim, Jinjun Xiong, and Deming Chen. Implementing long-term recurrent convolutional network using HLS on
POWER system. OpenPOWER US Summit,
March 2018. |
|
2017 |
· Dimitrios Skarlatos, Nam Sung Kim, and
Josep Torrellas. PageForge: A near memory same-page merging architecture. IEEE/ACM International Symposium
on Microarchitecture (MICRO), 12 pages, October 2017. · Sungjoon Koh, Jie Zhang, Miryeong Kwon,
Jungyeon Yoon, David Donofrio, Nam Sung Kim, and Myoungsoo Jung. Understanding system characteristics of online erasure coding on
scalable, distributed and large-scale SSD array systems. IEEE International Symposium on Workload Characterization (IISWC), 11
pages, October 2017. · Sukhan Lee, Young Hoon Son, Hyunyoon Cho,
Yuhwan Ro, Nam Sung Kim, and Jung Ho Ahn. Understanding and exploiting power-performance relationship of
energy-efficient modern DRAM devices for chip multiprocessor workloads. IEEE International Symposium on Workload Characterization (IISWC),
October 2017. · [IEEE/Amazon/DARPA
Graph Challenge Champions, Honorable Mention] Ketan Date, Keven Feng, Rakesh Nagi,
Jinjun Xiong, Nam Sung Kim, Wen-Mei Hwu. Collaborative (CPU + GPU) algorithms for triangle counting and truss
decomposition on the Minsky architecture. IEEE High Performance Extreme Computing Conference (HPEC), September
2017. · Daehoon Kim, Mohammad Alian, Jaehyuk Huh,
and Nam Sung Kim. Supporting heterogeneous power management in virtualized environments ACM Symposium on Cloud Computing (SoCC), September 2017. · [Nominated for the Best Paper Award][IEEE
Micro Top Pick Honorable Mention] Mohammad Alian, Gabor Dozsa, Umur Darbaz, Stephan Diestelhorst,
Dahoon Kim, and Nam Sung Kim. dist-gem5: Distributed simulation of computer clusters. IEEE International Symposium on Performance Analysis of Systems and
Software (ISPASS), 12 pages, April 2017. · [Nominated
for the Best Paper Award]
Mohammad Alian, Ahmed Abulila, Lokesh Jindal, Dahoon Kim, and Nam Sung Kim. NCAP: Network-driven, packet context-aware power management for
client-server architecture. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), 12 pages, February 2017. · Zhenhong Liu, Syed Gilani, Murali
Annavaram, and Nam Sung Kim. G-Scalar: Cost-effective generalized scalar execution architecture
for power-efficient GPUs. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), 12 pages, February 2017. · Sanguhn Cha, Seongil O, Hoeju Chung,
Uksong Kang, Churoo Park, Hyunsung Shin, Sangjun Hwang, Kwangil Park, Seong
Jin Jang, Joo Sun Choi, Gyo Young Jin, Young Hoon Son, Hyunyoon Cho, Jung Ho
Ahn and Nam Sung Kim. Defect analysis and cost-effective resilience architecture for future
DRAM devices. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), 12 pages, February 2017. · Bingchao Li, Jizhou Sun, Murali Annavaram
and Nam Sung Kim. Elastic-cache: GPU cache architecture for efficient fine- and
coarse-grained cache-line management. IEEE International Parallel and Distributed Processing Symp. (IPDPS),
May 2017. · Li Jiang, Tianjian Li, Naifeng Jing, Nam
Sung Kim, Minyi Guo, and Xiaoyao Liang. CNFET-based high throughput SIMD architecture. IEEE Transactions on Computer-Aided Design of Integrated Circuits and
Systems (TCAD), in press. · Taejoon Park, Kyoosik Shin, and Nam Sung
Kim. Energy-efficient approximate audio signal processing engine for
wearable devices. Electronics and Telecommunications Research Institute (ETRI) Journal,
vol: 39, no: 2, April, 2017. · Nam Sung Kim, Deming Chen, Jinjun Xiong,
and Wen-mei Hwu. Heterogeneous computing meets near-nemory acceleration and high-level
synthesis in the post-Moore era. IEEE Micro, to appear. · Bingchao
Li, Choungki Song, Jizeng Wei, Jung Ho Ahn, and Nam Sung Kim. Exploring new features of high-bandwidth memory for GPUs. IEICE Electronics Express, 11 pages, in press. · DaeHan Ahn, Hyerim Chung, Ho-Won Lee,
Kyunghun Kang, Pan-Woo Ko, Nam Sung Kim, and Taejoon Park. Defect analysis and cost-effective resilience architecture for future
DRAM devices. IEEE Transactions on Biomedical Engineering, in press. |
|
2016 |
· Hadi Asghari-Moghaddam, Young Hoon Son,
Jung Ho Ahn, and Nam Sung Kim. Chameleon: Versatile and practical near-DRAM acceleration
architecture for large memory systems. IEEE/ACM International
Symposium on Microarchitecture (MICRO), 12 pages, October 2016. · Dimitrios Skarlatos, Renji Thomas, Aditya
Agrawal, Shibin Qin, Robert Pilawa, Ulya Karpuzcu, Radu Teodorescu, Nam Sung
Kim, and Josep Torrellas. Snatch: Opportunistically reassigning power allocation between
processor and memory in 3D stacks. IEEE/ACM International
Symposium on Microarchitecture (MICRO), 12 pages, October 2016. · S. Karen Khatamifard, Nam Sung Kim, and
Ulya Karpuzcu. A modular architectural model of parametric variability for emerging
switches. IEEE International Conference on Computer Design (ICCD), 8 pages,
October 2016. · Tianjian Li, Li Jiang, Naifeng Jing, Nam
Sung Kim, and Xiaoyao Liang. CNFET-based high throughput register file architecture. IEEE International
Conference on Computer Design (ICCD), 8 pages, October 2016. · Ting Wang, Nam Sung Kim, and Qiaang Xu. On effective and efficient quality management for approximate
computing. IEEE/ACM International
Symposium on Low Power Electronics and Design (ISLPED), 6 pages, August 2016. · Matthew Tomei, Henry Duwe, Nam Sung Kim,
and Rakesh Kumar. Bit Serializing a Microprocessor for Ultra-low-power. IEEE/ACM International
Symposium on Low Power Electronics and Design (ISLPED), 6 pages, August 2016. · Jongwan Yoon, Andrew Park, Nam Sung Kim,
and Taejoon Park. Cost-effective, asynchronous inter-sensor distance estimation using
trigonometry. IET Electronic Letters,
vol. 52, no. 12, June 2016. · Hadi Asgharimoghaddam, Hamid Reza Ghasemi,
Abhishek A. Sinkar, Indrani Paul, and Nam Sung Kim. VR-Scale: Runtime dynamic phase scaling of processor voltage
regulators for improving power efficiency. IEEE/ACM Design Automation Conference (DAC), 6 pages, June 2016. · Li Jiang, Naifeng Jing, Xie Feng, Nam Sung
Kim, and Xiaoyao Liang. CNFET-based high throughput register file architecture. IEEE/ACM Design Automation Conference (DAC), poster, June 2016. · Hao Wang, Jie Zhang, Sharmila Shridhar,
Gieseo Park, Myoungsoo Jung, Nam Sung Kim. DUANG: Lightweight page migration and adaptive asymmetry in memory
systems. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), 12 pages, March 2016. · Bhargava Gopireddy, Choungki Song, Josep
Torrellas, Nam Sung Kim, Aditya Agrawal, and Asit Mishra. ScalCore: Designing a core for voltage scalability. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), 12 pages, March 2016. · Daniel Wong, Nam Sung Kim, and Murali
Annavaram. Approximating warps with intra-warp operand value similarity. IEEE International Symposium on High-Performance Computer
Architecture (HPCA), 12 pages, March 2016. · Qiaang Xu, Todd Mytkowicz, and Nam Sung
Kim. Approximate computing: A survey. IEEE Design & Test, vol: 33, no:, 1, pages: 8-22, February 2106. · Hadi Asgharimoghaddam, Amin
Farmahini-Farahani, Katherine Morrow, Jung Ho Ahn, and Nam Sung Kim. Near-DRAM acceleration with single-ISA heterogeneous processing in
standard memory modules. IEEE Micro, vol: 36, no: 1, pages: 24-34, January-February 2016. · Mohammad Alian, Daehoon Kim, and Nam Sung
Kim. pd-gem5: Simulation
infrastructure for parallel/distributed computer systems. IEEE Computer Architecture Letters, vol: 15, no: 1., pages: 41-44,
January-June, 2016. · Hadi Asgharimoghaddam and Nam Sung Kim. SpinWise: A Practical Energy-Efficient Synchronization Technique for
CMPs. ACM SIGARCH Computer Architecture News, vol: 44, no: 1, May 2016. · Jae Young Jang, Hao Wang, Euijin Kwon, Jae
W. Lee, and Nam Sung Kim. Workload-aware optimal power allocation on single-chip heterogeneous
processors. IEEE Transactions on Parallel and Distributed Systems, vol: 27, no:
6, June 2016. · Amir
Yazdanbakhsh, Jacob Sacks, Choungki Song, Pejman Lotfi-Kamran, Hadi
Esmaeilzadeh, and Nam Sung Kim. NAX: Near data approximate computing. Workshop on Approximate Computing (AC), October 2016. · Wayne
Burleson, Shomit Das, Yasuko Eckert, and Nam Sung Kim. Heterogeneous computing – a path to post-Moore supercomputing:
architecture, circuits, and process. Post-Moore’s Era Supercomputing (PMES) Workshop in conjunction with
IEEE/ACM International Conference for High Performance Computing, Networking,
Storage and Analysis (SC), November 2016.
· Paula
Aguilera, Dong Ping Zhang, Nuwan Jayasena and Nam Sung Kim. Fine-grained task migration for graph algorithms using processing in
memory. Workshop on Advances in Parallel and Distributed Computational Models
(APDCM) in Conjunction with IEEE International Parallel and Distributed
Processing Symp. (IPDPS), May, 2016. · Michael Mishkin, Nam Sung Kim, and Mikko
Lipasti. Hazard prevention models in GPGPUSim. Workshop on Duplicating, Deconstructing and Debunking in conjunction
with IEEE International Symposium on Computer Architecture, June 2016. |
|
2015 |
· Zhenhong Liu and Nam
Sung Kim. An ultra-low-power image signal processor for smart camera
applications. CISS Research Series, Book 3: Smart Camera, Springer, 2015. · Daehoon Kim, Hwanju
Kim, Nam Sung Kim, Jaehyuk Huh. vCache: Architectural support for transparent and isolated virtual
LLCs in virtualized environments. IEEE/ACM International
Symposium on Microarchitecture (MICRO), 12 pages, December 2015. · Hyeran Joen, Gokul
Subramanian Ravi, Nam Sung Kim, Murali Annavaram. GPU register file virtualization. IEEE/ACM International
Symposium on Microarchitecture (MICRO), 12 pages, December 2015. · Hamid Reza Ghasemi,
Ulya Karpuzcu, and Nam Sung Kim. Comparison of single-ISA heterogeneous versus wide dynamic range
processors for mobile applications. IEEE International Conference on Computer Design (ICCD), 6 pages,
October 2015. · Sankaralingam
Panneerselvam, Michael M. Swift, and Nam Sung Kim. Bolt: Faster reconfiguration in operating systems. USENIX Annual Technical Conference (ATC), 6 pages, July 2015. · David Palframan, Nam Sung Kim, and Mikko Lipasti.
COP: To compress and
protect main memory. IEEE/ACM International
Symposium on Computer Architecture (ISCA), 12 pages, June 2015. · Amir Yazdanbakhash,
David Palframan, Azadeh Davoodi, Nam Sung Kim, and Mikko Lipasti. Online and operand-aware detection of failures utilizing false alarm
vectors. IEEE/ACM Great Lake
Symp. on VLSI (GLSVLSI), 6 pages, Apr 2015. · Richard Berger,
Richard Ferguson, Addison Floyd, and Nam Sung Kim. Next generation space processor study. Government Microcircuits Applications & Critical Technology
(GOMACTech) Conference, March 2015. · Young Hoon Son, Sukhan
Lee, Seongil O, Sanghyuk Kwon, Nam Sung Kim, and Jung Ho Ahn. CiDRA: A Cache-inspired DRAM resilience architecture. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2015. · Hao Wang, Changjae Park, Gyungsu Byun, Jung Ho
Ahn, and Nam Sung Kim. Alloy: Parallel-serial
memory channel architecture for single-chip heterogeneous processor systems. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2015. · Amin Farmahini-Farahani, Katherine Morrow, Jung
Ho Ahn, and Nam Sung Kim. NDA: Near-DRAM
acceleration architecture leveraging commodity DRAM devices and standard
memory modules. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2015. · David Palframan, Nam Sung Kim, and Mikko Lipasti.
iPatch: Intelligent
fault patching to improve energy efficiency. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2015. · Zhenhong Liu, Taejoon
Park, Hyun Sang Park, and Nam Sung Kim. An ultra-low-power image signal processor for smart camera
applications. IET Electronic Letters,
vol: 51, no: 22, pages: 1778-1780, October 2015. · Ismail Akturk, Ulya
Karpuzcu, and Nam Sung Kim. Decoupling control and data processing for approximate near-threshold
voltage computing. IEEE Micro, July-August 2015. ·
Heesung
Lim, Taejoon Park, and Nam Sung Kim. Joint optimization of
computational accuracy and algorithm parameters for energy-efficient
recognition algorithms. IET Electronic Letters,
vol: 51, no: 16, pages: 1238-1240, August 2015. |
|
2014 |
· Paula Aguilera, Katherine Morrow, and Nam Sung
Kim. Fair share: Allocation
of GPU resources for both performance and fairness. IEEE International
Conference on Computer Design (ICCD), 6 pages, October 2014. · Hamid Reza Ghasemi and Nam Sung Kim. RCS: runtime resource and core scaling for power-constrained
multi-core processors. ACM International
Conference on Parallel Architecture and Compilation Techniques (PACT), 12
pages, August 2014. · Hao Wang, Ripudaman Singh, and Nam Sung Kim. Memory scheduling towards high-throughput cooperative heterogeneous
computing. ACM International
Conference on Parallel Architecture and Compilation Techniques (PACT), 12
pages, August 2014. · Yanpei Liu, Stark
Draper, and Nam Sung Kim. SleepScale: Runtime joint speed scaling and sleep states management
for power efficient data centers. IEEE/ACM International
Symposium on Computer Architecture (ISCA), 12 pages, June 2014. · Young Hoon Son,
Seongil O, Nam Sung Kim, and Jung Ho Ahn. Row-buffer decoupling: A case for low-latency DRAM microarchitecture.
IEEE/ACM International
Symposium on Computer Architecture (ISCA), 12 pages, June 2014. · Hoyoung Kim, Soojung
Ryu, Abhishek Sinkar,and Nam Sung Kim.
Quantitative comparison of the power reduction techniques Samsung
reconfigurable processor. IEEE International Symposium Circuits and Systems (ISCAS), 4 pages,
June 2014. · Amin Farmahini-Farahani, Nam Sung Kim, and
Katherine Morrow. Energy-efficient
reconfigurable cache architectures for accelerator-enabled embedded systems. IEEE International
Symposium on Perf. Analysis of Systems and Software (ISPASS), 10 pages, Apr 2014. ·
Abhishek
A. Sinkar, Hao Wang, and Nam Sung Kim. Maximizing throughput
of power/thermal-constrained processors by balancing power consumption of
cores. IEEE International Symposium on Quality Electronic Design (ISQED), 6
pages, March 2014. ·
Ulya
Karpuzcu, Ismail Akturk, and
Nam Sung Kim. Accordion: Toward soft
near-threshold voltage computing. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2014. ·
David
Palframan, Nam Sung Kim, and Mikko Lipasti. Precision-aware soft
error protection for GPUs. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2014. ·
Paula
Aguilera, Jungseob Lee, Amin Farmahini Farahani, Michael Schulte, Katherine
Morrow and Nam Sung Kim. Variation-aware
workload partitioning algorithms for GPUs supporting spatial multitasking. IEEE/ACM IEEE/ACM
Design Automation and Test in European (DATE), 6 pages, March 2014. ·
Paula
Aguilera, Katherine Morrow, Nam Sung Kim. QoS-aware dynamic
resource allocation for spatial-multitasking GPUs. IEEE/ACM Asia South
Pacific Design Automation Conference (ASP-DAC), 6 pages, January 2014. · Dae Han Ahn, Nam Sung Kim, Sang Jun Moon, Taejoon Park, and Sang Hyuk Son. Optimization of a cell counting algorithm for mobile point-of-care
testing platforms. Sensors, vol: 14, no: 8,
August 2014. · Syed Gilani,
Taejoon Park, and Nam Sung Kim.
Low-cost scratchpad
memory organizations using heterogeneous cell sizes for low-voltage
operations. Microprocessors and
Microsystems, vol: 38, no: 7, October 2014. · Srinivasan Narayanamoorthy, Hadi Asghari Moghaddam, Zhenhong Liu, Taejoon Park, and Nam Sung Kim. Energy-efficient approximate multiplication
for digital signal processing and classification applications. IEEE Transactions on
Very Large Scale Integration (VLSI) Systems. In press. ·
Syed
Gilani, Nam Sung Kim, and Michael Schulte. Energy-efficient pixel
arithmetic. IEEE Transactions on
Computers, vol: 63, no: 8, August 2014. ·
Nam Sung Kim,
Taejoon Park, Srinivasan Narayanamoorthy, and Hadi Moghaddam. Multiplier supporting accuracy and energy
trade-offs for recognition applications. IET Electronics Letters, vol: 50, no: 7,
pages: 512-514, March, 2014. |
|
2013 |
· Syed Gilani, Nam Sung Kim, and Michael Schulte. Exploiting GPU peak-power
and performance tradeoffs through reduced effective pipeline latencies. IEEE/ACM International
Symposium on Microarchitecture (MICRO), 12 pages, December 2013. · Daniel Chang, Younghoon Son, Jung Ho Ahn, Hoyoung Kim, Minwook Ahn, Michael Schulte, and Nam Sung Kim. Dynamic bandwidth
scaling for embedded DSPs with 3D-stacked DRAM and wide I/Os. IEEE/ACM International
Conference on Computer Aided Design (ICCAD), 8 pages, November 2013. · Hao Wang, Abhishek A. Sinkar, and Nam Sung Kim. Improving platform
energy-chip area trade-off in near-threshold computing environment. IEEE/ACM International
Conference on Computer Aided Design (ICCAD), 8 pages, November 2013. · Vignyan Naresh, Syed Gilani, Erika Gunadi, Nam Sung Kim, Michael Schulte, and Mikko Lipasti. REEL: Reducing
effective execution latency of floating point operation. IEEE/ACM International
Symposium on Low Power Electronic Design (ISLPED), 6 pages, September 2013. · Amir Yazdanbakhsh, David Palframan, Azadeh Davoodi, Nam Sung Kim, Mikko Lipasti. Online and
operand-aware detection of failures by utilizing false alarm vectors. IEEE International
Workshop on Logic and Synthesis (IWLS), 6 pages, June 2013. · Jingwen Leng, Syed Gilani, Ahmed El-Shafiey, Tayler Hetherington, Nam Sung Kim, Tor M. Aamodt, Vijay Janapa Reddi. GPUWattch: Enabling
energy optimizations in GPGPUs. IEEE/ACM International
Symposium on Computer Architecture (ISCA), 12 pages, June 2013. · Yanpei Liu, Stark C. Draper, Nam Sung Kim. Queuing theoretic
analysis of power-performance tradeoff in power-efficient computing. IEEE Conference on
Information Sciences and Systems (CISS), 8 pages, March 2013. · Ulya Karpuzcu, Abhishek Sinkar, Nam Sung Kim, and Josep Torrellas. EnergySmart: Toward
energy-efficient manycores for near-threshold computing. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2013. · Syed Gilani, Nam Sung Kim, and Michael Schulte. Power-efficient
computing for compute-intensive GPGPU applications. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages,
February 2013. · Daniel W. Chang, Gyungsu Byun, Nam Sung Kim, and Michael J. Schulte. Reevaluating the
latency claims of 3D stacked memories (a.k.a. 3D LIES: A 3D latency-based
interconnect evaluation for stacked-memories). IEEE/ACM Asia South
Pacific Design Automation Conference (ASP-DAC), 6 pages, January 2013. · Ulya Karpuzcu, Nam Sung Kim, and Josep Torrellas. Coping with the higher
susceptibility to parametric variation at near-threshold voltages. IEEE Micro, vol: 33,
no: 4, pages: 6-14, July/August, 2013. · David Palframan, Nam Sung Kim, and Mikko Lipasti. Resilient
high-performance processors with spare RIBs. IEEE Micro, vol: 33,
no: 4, pages: 26-34, July/August, 2013. · Hao Wang and Nam Sung Kim. Improving throughput of
many-core processors based on unreliable emerging devices under power
constraInternational IEEE Micro, vol: 33,
no: 4, pages: 16-24, July/August, 2013. · Abhishek Sinkar, Hamid Reza Ghasemi, Ulya Karpuzcu, Michael Schulte, and Nam Sung Kim. Low-cost per-core
voltage domain support for power-constrained high-performance processors. IEEE Transactions on
Very Large Scale Integration (VLSI) Systems, vol: 22, no: 4, pages: 747-758,
2013. · Alaa R. Alameldeen, Nam Sung Kim, Samira M. Khan, Hamid Reza Ghasemi, Chris Wilkerson, Jaydeep Kulkarni, and Daniel A. Jiménez. Improving memory
reliability, power and performance using mixed-cell designs. Intel Technology
Journal, 2013. · Abhishek Sinkar Taejoon Park, Nam Sung Kim. Clamping virtual supply
voltage of power-gated circuits for active leakage reduction and gate-oxide
reliability improvement. IEEE Transactions on
Very Large Scale Integration (VLSI) Systems,
vol: 21, no: 3, pages: 580-584, March 2013. · Euijin Kwon, Jae Young Jang, Jae W. Lee, and Nam Sung Kim. Optimal power
allocation for multiprogrammed workload on single-chip heterogeneous
processors. Workshop on Energy
Efficient Design (WEED) in conjunction with IEEE/ACM International Symposium
on Computer Architecture (ISCA), 2013. |
|
2012 |
· Vijay Sathish, Michael Schulte, and Nam Sung Kim. Lossless and lossy memory-link compression techniques for improving performance of memory-bound GPGPU workloads. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), 10 pages, September 2012. · Hao Wang, Vijay Sathish, Ripudaman Singh, Michael Schulte, and Nam Sung Kim. Workload and power budget partitioning for single-chip heterogeneous processors. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), 12 pages, September 2012. · Syed Gilani, Nam Sung Kim, and Michael Schulte. Power-efficient computing for compute-intensive GPGPU applications. ACM International Conference on Parallel Architecture and Compilation Techniques (PACT), September 2012. · Syed Gilani, Nam Sung Kim, and Michael Schulte. Virtual floating-point units for low-power embedded processors. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 8 pages, July 2012. · Ardavan Pedram, Andreas Gerstlauer, Robert A. van de Geijn, Syed Gilani, Michael Schulte, and Nam Sung Kim. A linear algebra core design for efficient level-3 BLAS. IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), July 2012. · David Palframan, Nam Sung Kim, and Mikko Lipasti. Mitigating random variation with spare RIBs: Redundant intermediate bitslices. IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 10 pages, June 2012. · Ulya Karpuzcu, Krishna Kolluru, Nam Sung Kim, and Josep Torrellas. VARIUS-NT: A microarchitectural model of process variation for near-threshold voltage computing,” IEEE/IFIP International Conference on Dependable Systems and Networks (DSN), 12 pages, June 2012. · Hamid Reza Ghasemi, Abhishek Sinkar, Michael Schulte, and Nam Sung Kim. Cost-effective power delivery to support per-core voltage domains for power-constrained processors. IEEE/ACM Design Automation Conference (DAC), 6 pages, June 2012. · Abhishek Sinkar, Hao Wang, and Nam Sung Kim. Workload-aware voltage regulator optimization for power efficient multi-core processors. IEEE/ACM Design Automation and Test in European (DATE), March 2012. · Jacob T. Adriaens, Katherine Compton, Nam Sung Kim, and Michael Schulte. The case for GPGPU spatial multitasking. IEEE International Symposium on High-Performance Computer Architecture (HPCA), 12 pages, February 2012. · Jungseob Lee and Nam Sung Kim. Analyzing potential throughput improvement of power- and thermal-constrained multicore processors by exploiting DVFS and PCPG. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol: 20, no: 2, pages: 225-235, February 2012. · Nam Sung Kim, Stark Draper, Shi-Ting Zhou, Sumeet Katariya, Hamid Reza Ghasemi, and Taejoon Park. Analyzing the impact of joint optimization of cell size, redundancy, and ECC on low-voltage SRAM array total area. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol: 20, no 12, pages: 2333- 2337, December 2012. · Nam Sung Kim, Abhishek Sinkar, Jun Seomun, and Youngsoo Shin. Maximizing frequency and yield of power-constrained designs using programmable power-gating. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol: 20, no 10, pages: 1885-1890, October 2012. |
|
2011 |
· Syed Gilani, Nam Sung Kim, and Michael Schulte. Energy-efficient floating-point
arithmetic for low-power digital signal processors. IEEE Asilomar
Conference on Signals Systems, and Computers, 6 pages, November 2011. · Jungseob Lee, Vijay Satish, Katherine Compton, Michael Schulte, and Nam Sung Kim. Improving the
throughput of power-constrained GPUs using dynamic voltage/frequency and core
scaling. ACM International
Conference on Parallel Architectures and Compilation Techniques (PACT), 10
pages, October 2011. · Syed Gilani, Nam Sung Kim, and Michael Schulte. Energy-efficient
floating-point arithmetic for software-defined radio architectures. IEEE International
Conference on Application-specific Systems, Architectures and Processors
(ASAP’11), 8 pages, September 2011. · Jungseob Lee, Vijay Satish, Katherine Compton, Michael Schulte, and Nam Sung Kim. Workload-aware
throughput optimization of power-constrained GPGPUs. Semiconductor Research
Corporation (SRC) Technical Conference (TECHCON), September 2011. This conference is only open to the SRC member
companies and institutions. · Jacob T. Adriaens, Katherine Compton, Nam Sung Kim, Michael Schulte. The Case for GPGPU
spatial multitasking. Semiconductor Research Corporation (SRC) Technical
Conference (TECHCON), September
2011. This conference is only
open to the SRC member companies and institutions. · Daniel Chang, Nam Sung Kim, and Michael Schulte. Analyzing the
performance and energy impact of 3D memory integration on embedded DSPs. IEEE International
Conference on Embedded Computer Systems: Architectures, Modeling, and
Simulation (SAMOS XI), 8 pages, July 2011. · Jungseob Lee, Paritosh Ajgaonkar, and Nam Sung Kim. Analyzing throughput of
GPGPUs exploiting within-die core-to-core frequency variation. IEEE International
Symposium on Perf. Analysis of Systems and Software (ISPASS), 10 pages, Apr 2011. · Krishna Bharath, Chunhua Yao, Nam Sung Kim, Parmesh Ramanathan, and Kewal Saluja. A low cost approach to
calibrate on-chip temperature sensors. IEEE International Symposium on Quality Electronic Design (ISQED),
March 2011. · Syed Gilani, Nam Sung Kim, and Michael Schulte. Scratchpad memory
optimizations for digital signal processing applications. IEEE/ACM Design
Automation and Test in European (DATE), 6 pages, March 2011. · David Palframan, Nam Sung Kim, and Mikko Lipasti. Time-redundant parity
for transient fault detection in combinational circuits. IEEE/ACM Design
Automation and Test in European (DATE), 6 pages, March 2011. · Hamid Reza Ghasemi, Stark Draper, and Nam Sung Kim. Low-voltage on-chip
cache architecture using heterogeneous cell sizes for multi-core processors. IEEE International
Symposium on High-Performance Computer Architecture (HPCA), 12 pages, February 2011. · Abhishek Sinkar and Nam Sung Kim. AVS-aware power-gate
sizing for maximum performance and power efficiency of power-constrained
processors. IEEE/ACM Asia South
Pacific Design Automation Conference (ASP-DAC), 6 pages, January 2011. · David Palframan, Nam Sung Kim, and Mikko Lipasti. Spare RIBs: Redundant
intermediate bitslices. Workshop on Resilient
Architectures (WRA) in conjunction with IEEE/ACM International Symposium on
Microarchitecture (MICRO), 6 pages, December 2011. · Jungseob Lee, Vijay Satish, Katherine Compton, Michael Schulte, and Nam Sung Kim. Workload-aware
throughput optimization of power-constrained GPGPUs. IEEE/ACM Design Automation Conference (DAC), June 2011. |
|
2010 |
· Erika Gunadi, Abhishek Sinkar, Nam Sung Kim, and Mikko Lipasti. Combating aging with the
COLT duty cycle equalizer. IEEE/ACM International
Symposium on Microarchitecture (MICRO), 12 pages, December 2010. · Danbee Park, Jungseob Lee, Nam Sung Kim, and Taewhan Kim. Optimal Algorithm for Profile-Based
Power-Gating: A Compiler Technique for Reducing Leakage on Execution Units in
Microprocessors. IEEE/ACM International
Conference on Computer Aided Design (ICCAD’10), November 2010. · Shi-Ting Zhou, Sumeet Katariya, Hamid Ghasemi, Stark Draper, and Nam Sung Kim. Minimizing total area
of low-voltage SRAM arrays through joint optimization of cell size,
redundancy, and ECC. IEEE International
Conference on Computer Design (ICCD), 6 pages, October 2010. · Jungseob Lee, Eric Wang, Hamid Ghasemi, Lloyd Bircher, Yu Cao, and Nam Sung Kim. Workload-adaptive
process tuning strategy for power-efficient multi-core processors. IEEE/ACM International Symposium on Low Power Electronic Design
(ISLPED), 6 pages, August 2010. · Abhishek Sinkar and Nam Sung Kim. Analyzing and
minimizing effects of temperature variation and NBTI on active leakage power
of power-gated circuits. IEEE International Symposium on Quality Electronic Design (ISQED), 6
pages, March 2010. · Dong-Keun Oh, Nam Sung Kim, Charlie Chen, and Yu-Hen Hu. The compatibility
analysis of thread migration and DVFS in multi-core processor. IEEE International Symposium on Quality Electronic Design (ISQED), 6
pages, March 2010. · Jungseob Lee, Shi-Ting Zhou, and Nam Sung Kim. Analyzing impact of
multiple ABB and AVS domains on throughput of power and thermal-constrained
multi-core processors. IEEE/ACM Asia South
Pacific Design Automation Conference (ASP-DAC), 6 pages, January 2010. · Dong-Keun Oh, Nam Sung Kim, Charlie Chung Ping Chen, Yu-Hen Hu, and Azadeh Davoodi. Runtime
temperature-based power estimation for optimizing throughput of
thermal-constrained multi-core processors. IEEE/ACM Asia South
Pacific Design Automation Conference (ASP-DAC), 6 pages, January 2010. |
|
2009 |
· Abhishek Sinkar and Nam Sung Kim. IEEE/ACM International
Symposium on Low Power Electronic Design (ISLPED), 6 pages, August 2009. · Jungseob Lee and Nam Sung Kim. IEEE/ACM International
Symposium on Low Power Electronic Design (ISLPED), 6 pages, August 2009. · Mike Anderson, Azadeh Davoodi, Abhishek Sinkar, Jungseob Lee, and Nam Sung Kim. Statistical static timing analysis
considering leakage variability in power-gated design. IEEE/ACM International
Symposium on Low Power Electronic Design (ISLPED), 6 pages, August 2009. · Nam Sung Kim, Jun Seomun, Abhishek Sinkar, Jungseob Lee, Tae Hee Han, Ken Choi, and Youngsoo Shin. Frequency and yield optimizations
in power-constrained designs. IEEE/ACM International
Symposium on Low Power Electronic Design (ISLPED), 6 pages, August 2009. · Jungseob Lee and Nam Sung Kim. Throughput analysis and
optimization of power and thermal constrained multicore processors.
IEEE/ACM Design
Automation Conference (DAC), July 2009. Acceptance rate is 22% (148/682). · Nam Sung Kim. Power-efficient
computing through approximations and morphic primitives for future teraflops
workloads. Workshop on New
Directions in Computer Architecture (NDCA) in conjunction with the 2009
International Symposium on Microarchitecture (MICRO), December 2009. · Dongkeun Oh, Nam Sung Kim, Charlie Chung Ping Chen, and Yu Hen Hu. A mathematical method
for VLSI thermal simulation at the system and circuit-levels. Recent Advancements in
Modeling of Semiconductor Processes, Circuits and Chip-Level Interactions
(Rasit Onur Topaloglu, Peng Li eds.), Bentham Publishing, 2009. |
|
Research Scientist Period |
· DiaaEldin Khalil, Muhammad Khellah, Nam Sung Kim, Yehea Ismail, Tanay Karnik and Vivek De. SRAM
dynamic stability estimation using MPFP and its applications. Microelectronics
Journal, vol: 40, no: 11, pages: 1523-1530, November 2009. · Muhammad Khellah, Nam Sung Kim, et al. IEEE Journal of Solid
State Circuits (JSSC), vol 44, no: 4, pages:1199-1208, Apr 2009. · Keith Bowman, James Tschanz, Nam Sung Kim, Janice Lee, Chris Wilkerson, Shih-Lien L. Lu, Tanay Karnik, and Vivek De. Energy-efficient
and metastability-immune resilient circuits for dynamic variation tolerance.
IEEE Journal of Solid
State Circuits (JSSC), vol: 44, no: 1, pages: 49-63, January 2009. · Muhammad Khellah, Nam Sung Kim, Yibin Ye, Dinesh Somasekhar, Tanay Karnik, Nitin Borkar, Fatih Hamzaoglu, Tim Coan, Yih Wang, Kevin Zhang, Clair Webb, and Vivek De. PVT-variations and
supply-noise tolerant 45nm dense cache arrays with diffusion-notch-free (DNF)
6T SRAM cells and dynamic multi-Vcc circuits,” IEEE VLSI Circuit
Symp., June 2008. · Keith Bowman, James Tschanz, Nam Sung Kim, Janice Lee, Chris Wilkerson, Shih-Lien Lu, Tanay Karnik, and Vivek K. De. Energy-efficient &
metastability-immune timing-error detection and instruction replay-based
recovery circuits for dynamic variation tolerance. IEEE International
Solid-State Circuit Conference (ISSCC), February 2008. · Diaa Khalil, Muhammad Khellah, Nam Sung Kim, Yehea Ismail, Tanay Karnik, and Vivek De. Accurate estimation of
SRAM dynamic stability. IEEE Transactions on Very Large Integration (VLSI) Systems, vol: 16, no: 12, pages: 1639-1647, December 2008. · David Roberts, Nam Sung Kim and Trevor Mudge. On-chip cache device
scaling limits and effective fault repair techniques in future nanoscale
technology. Microprocessors and Microsystems, vol: 32, no: 5-6, pages:
244-253, August 2008. · Keith Bowman, James Tschanz, Nam Sung Kim, Janice Lee, Chris Wilkerson, Shih.-Lien. Lu, Tanay Karnik, and Vivek De. Energy-efficient and
metastability-immune timing-error detection and recovery circuits for dynamic
variation tolerance. IEEE International
Conference on Integrated Circuit Design and Technology (ICICDT), 2008. · DiaaEldin Khalil, Muhammad Khellah, Nam-Sung Kim, Yehea Ismail, Tanay Karnik, and Vivek De. SRAM dynamic stability
estimation using MPFP. IEEE International Conference on Microelectronics (ICM), December 2007. · Gregory Chen, David Blaauw, Trevor Mudge, Dennis Sylvester, and Nam Sung Kim. Yield-driven
near-threshold SRAM design. IEEE/ACM International
Conference on Computer Aided Design (ICCAD), 6 pages, November 2007. · David Roberts, Nam Sung Kim and Trevor Mudge. On-chip cache device
scaling limits and effective fault repair techniques in future nanoscale
technology. IEEE Euro Micro Conference on Digital System Design (DSD), 8 pages, August 2007. · James Tschanz, Nam Sung Kim, et al. Adaptive frequency and
biasing techniques for tolerance to dynamic temperature-voltage variations
and aging. IEEE International
Solid-State Circuit Conference (ISSCC), February 2007. · Muhammad Khellah, Dinesh Somasekhar, Yibin Ye, Nam Sung Kim, Gunjan Pandya, Ali Farhang, Kevin Zhang, and Vivek De. A 256-Kb dual-VCC SRAM
building block in 65-nm CMOS process with actively clamped sleep transistor. IEEE Journal of Solid
State Circuits (JSSC), vol: 42, no: 1, pages:
233-207, January 2007. · Muhammad Khellah, Yibin Ye, Nam Sung Kim, Dinesh Somasekhar, Gunjan Pandya, Ali Farhang, Kevin Zhang, and Vivek De. Wordline & bitline
pulsing schemes for improving SRAM cell stability in low-Vcc 65nm CMOS
designs. IEEE VLSI Circuit
Symp., June 2006. · Muhammad Khellah, Nam Sung Kim, et al. A 4.2Ghz, 130Mb/cm2,
dual-Vcc SRAM in 65nm CMOS featuring active power management with autonomous
compensation of PVT variation & aging impacts. IEEE International
Solid-State Circuit Conference (ISSCC), February 2006. · Nam Sung Kim, Vivek De, and Trevor Mudge. Total power-optimal
pipelining and parallel processing under process variations in nanometer
technology. IEEE/ACM International
Conference on Computer Aided Design (ICCAD), 6 pages, November 2005. |
|
Graduate Student Period |
· Robert Bai, Nam Sung Kim, Dennis Sylvester, and Trevor Mudge. Total leakage
optimization strategies for multi-level caches. IEEE/ACM Great Lake
Symp. on VLSI (GLSVLSI), Apr 2005. · Robert Bai, Nam Sung Kim, Dennis Sylvester, and Trevor Mudge. Power-performance
trade-offs in nanometer scale multi-level caches considering total leakage
power. IEEE/ACM Design
Automation and Test in Europe (DATE), March 2005. · Nam Sung Kim, David Blaauw, and Trevor Mudge. Quantitative analysis
and optimization techniques for on-chip cache leakage power. IEEE Transactions on Very Large Integration (VLSI) Systems (TVLSI), vol: 13, no: 10, pages: 1147-1156, October
2005. · Nam Sung Kim, Valeria Bertaco, Todd Austin, and Trevor Mudge. Microarchitectural
power modeling technique for deep sub-micron processors. IEEE/ACM International Symposium on Low Power Electronic Design
(ISLPED), August
2004. · Nam Sung Kim and Trevor Mudge. Single-VDD
and single-VT super-drowsy techniques for low-leakage
high-performance instruction caches. IEEE/ACM International Symposium on Low Power Electronic Design
(ISLPED), August
2004. · Dan Ernst, Nam Sung Kim, et al. Razor: Circuit-level
correction of timing errors for low-power operation. IEEE Micro,
vol: 24, no: 6, pages: 10-20,
December 2004. [Top pick of Year 2004] · Nam Sung Kim, Kriszitan Flautner, David Blaauw, and Trevor Mudge. Circuit and
microarchitectural techniques for reducing cache leakage power. IEEE Transactions on Very Large Integration (VLSI) Systems (TVLSI), vol: 12, no: 2, pages: 167-184, February 2004. · Dan Ernst, Nam Sung Kim, et al. Razor: A low-power
pipeline based on circuit-level timing speculation. IEEE/ACM International Symposium on Microarchitecture (MICRO), 12 pages, December 2003. [Best Paper Award] · Nam Sung Kim, David Blaauw, and Trevor Mudge. Leakage power
optimization techniques for ultra deep sub-micron multi-level caches. IEEE/ACM International Conference on Computer Aided Design (ICCAD), 6 pages, November 2003. · Nam Sung Kim, Trevor Mudge, and Richard Brown. A 2.3Gb/s fully
integrated and synthesizable Rijndael core. IEEE Custom Integrated Circuit Conference (CICC), September 2003. · Nam Sung Kim and Trevor Mudge. The microarchitecture
for a low power register file. IEEE/ACM International Symposium on Low Power Electronic Design
(ISLPED), 6 pages,
August 2003. · Nam Sun Kim and Trevor Mudge. Reducing register ports
using delayed write-back queue and operand pre-fetch. ACM International Conference on Supercomputing (ICS), 11 pages, June 2003. · Nam Sung Kim, Todd Austin, David Blaauw, Trevor Mudge, Kriszitan Flautner, Jie S. Hu, Mary Jane Irwin, Mahmut Kandemir, and Vijaykrishnan Narayanan. Leakage current —
Moore’s Law meets static power. IEEE Computer, vol: 36, no: 12, pages: 68-75, December 2003. [Cover
Feature of Month] · Nam Sung Kim, Kriszitan Flautner, David Blaauw, and Trevor Mudge. Drowsy instruction
caches – Reducing leakage power using dynamic voltage scaling and cache
sub-bank prediction. IEEE/ACM International Symposium on Microarchitecture (MICRO), 12 pages, November 2002. · Kriszitan Flautner, Nam Sung Kim, Steven Martin, David Blaauw, and Trevor Mudge. Drowsy Caches: Simple
techniques for reducing leakage power. IEEE/ACM International Symposium on Computer Architecture (ISCA), 10 pages, May 2002. · Nam Sung Kim, Todd Austin, and Trevor Mudge, Low-energy data cache
using sign compression and cache line bisection. Annual Workshop on Memory Performance Issues (WMPI) in conjunction
with International Symposium on Computer Architecture, May 2002. · Nam Sung Kim, Todd Austin, Trevor Mudge, and D. Grunwald. Challenges for
architectural level power modeling in power aware computing (R. Melhem and R.
Graybill eds.). Kluwer Academic Publishers: Boston, MA, 2001. · Namseung Kim, Hoon Choi, Seungjong Lee, Seungwang Lee, In-Cheol Park, Chong-Min Kyung. Virtual chip: making functional model work on
real target systems. IEEE/ACM Design
Automation Conference (DAC), June 1998. |